Configurable width buffered module having switch elements
US7404032B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 13, 2004 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Jul 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K1/181
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system architecture/interconnect topology includes a configurable width buffered memory module having a configurable width buffer device with at least one switch element. A buffer device, such as a configurable width buffer device, is positioned between or with at least one integrated circuit memory device positioned on a substrate surface of a memory module, such as a DIMM. A switch element is positioned on or off a memory module and includes two transistors in embodiments of the invention. One or more switch elements are coupled to one or more channels to allow for upgrades of memory modules in a memory system. An asymmetrical switch topology allows for increasing the number of memory modules to more than two memory modules without adding switch elements serially on each channel. Switch elements allow for increasing the number of ranks of memory modules in a system, while also achieving many of the benefits associated with point-to-point topology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.