System and method for enhancing read performance of a memory storage system including fully buffered dual in-line memory modules
US7404057B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2005 |
| Grant date | Jul 22, 2008 |
| Priority date | — |
| Expiry date | Jan 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1666
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for enhanced read performance of a memory storage system is disclosed. The storage system includes a first memory controller. At least one first channel of a plurality of memory modules couples to the first memory controller. At least one memory module in the at least one first channel can return data sought in a read request, if present, to the first memory controller without sending the data through each memory module in the at least one first channel. The storage system also includes a second memory controller coupled to at least one second channel of a plurality of memory modules. At least one memory module in the at least one second channel can return data sought in a read request, if present, to the second memory controller without sending the data through each memory module in the at least one second channel. The at least one second channel contains an inverse mirror copy of data stored on the first channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.