Method of manufacturing an inductance
US7404249B2 · kind B2 · utility
9Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2002 |
| Grant date | Jul 29, 2008 |
| Priority date | — |
| Expiry date | Aug 17, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing an inductance in a monolithic circuit including a substrate of planar upper surface, including the steps of forming in the substrate a cavity substantially following the contour of the inductance to be formed, the cross-section of the cavity being deep with respect to its width; and filling the cavity with a conductive material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.