Method and system for chalcogenide-based nanowire memory
US7405420B1 · kind B1 · utility
7Cited by
7References
15Claims
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Key dates
| Filing date | Sep 29, 2006 |
| Grant date | Jul 29, 2008 |
| Priority date | — |
| Expiry date | Sep 29, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Chalcogenide-based nanowire memories are implemented using a variety of methods and devices. According to an example embodiment of the present invention, a method of manufacturing a memory circuit is implemented. The method includes depositing nanoparticles at locations on a substrate. Chalcogenide-based nanowires are created at the locations on the substrate using a vapor-liquid-solid technique. Insulating material is deposited between the chalcogenide-based nanowires. Lines are created to connect at least some of the chalcogenide-based nanowires.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.