Analog buffer circuit, display device and portable terminal
US7405720B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2003 |
| Grant date | Jul 29, 2008 |
| Priority date | — |
| Expiry date | Jul 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/375
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An analog buffer circuit which has small input and output offsets and reduced power consumption even if it is formed on an insulating substrate by TFTs, a display device which uses the analog buffer circuit as a peripheral driving circuit for a display unit, and a portable terminal in which the display device is provided as a screen display unit are provided. By performing offset detection on a source follower in such a manner that, for example, two capacitors Cn1 and Cn2 are connected to the gate of a NMOS transistor Qn11 as a source follower, and conduction/nonconduction control of switches Sn1 to Sn5 are performed, if needed, and by sequentially canceling the detected offsets, a final offset voltage is sufficiently reduced and high precision offset cancellation is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.