Method for performing design rule check of integrated circuit
US7406671B2 · kind B2 · utility
5Cited by
16References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2005 |
| Grant date | Jul 29, 2008 |
| Priority date | — |
| Expiry date | Apr 7, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for performing design rule check (DRC) of an integrated circuit. A design layout of the integrated circuit is provided. The integrated circuit includes a complex circuit. A DRC tool is used to compare a portion of the design layout with a reference layout containing an accurate implementation of the complex circuit. The portion of the design layout corresponds to the complex circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.