Method and apparatus for constructing and optimizing a skew of a clock tree
US7406672B2 · kind B2 · utility
6Cited by
4References
9Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 28, 2006 |
| Grant date | Jul 29, 2008 |
| Priority date | — |
| Expiry date | Sep 1, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for supporting a design of a circuit including a plurality of elements, comprising: an acquiring unit that acquires a clock tree of the circuit; a constructing unit that constructs, based on the clock tree, a plurality of groups each of which includes a part of elements of same skew; an analyzing unit that performs an analysis of a timing of an inter-group path between two of the groups; and an output unit that outputs a result of the analysis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.