Polymer memory having a ferroelectric polymer memory material with cell sizes that are asymmetric
US7407819B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2006 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | May 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A polymer memory and its method of manufacture are provided. One multi-layer construction of the polymer memory has two sets of word lines and a set of bit lines between the word lines. The word lines of each set of word lines have center lines that are spaced by a first distance from one another, and the bit lines have center lines spaced by a second distance from one another, the second distance being less than the first distance. Three masking steps are required to manufacture the three layers of lines. Older-technology machinery and masks are used to form the two layers of word lines, and new-technology machinery and masks are used to manufacture the bit lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.