Impedance calibration circuit and semiconductor device including the same
US7408379B2 · kind B2 · utility
11Cited by
0References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2007 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Sep 12, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An impedance calibration circuit and a semiconductor device including the same are provided. An embodiment of the invention provides an impedance calibration circuit with a variable reference voltage generation unit. The impedance calibration circuit maximizes the number of semiconductor devices that can be tested in test equipment at one time and permits the operation of an impedance matching unit (e.g., an on-die-termination (ODT) circuit and/or an off-chip-driver (OCD)) to be tested for a variety of reference resistor values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.