Apparatus for biasing a complementary metal-oxide semiconductor differential amplifier
US7408410B2 · kind B2 · utility
4Cited by
3References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 2, 2006 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Oct 10, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45408
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A bias generation circuit for biasing a differential amplifier is disclosed. The bias generation circuit is coupled to the differential amplifier. After determining a common-mode voltage of a pair of differential outputs from the differential amplifier, the bias generation circuit generates a bias voltage, which is proportional to the determined common-mode voltage, to the differential amplifier such that the common-mode input voltage range of the differential amplifier is extended to as far as the rail-to-rail voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.