Low inductance multilayer capacitor
US7408763B2 · kind B2 · utility
4Cited by
12References
38Claims
0Family size
Inventor
Key dates
| Filing date | Jul 13, 2006 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Nov 27, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/30
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A low inductance multilayer parallel plate capacitor including at least one pair of consecutive composite layers stacked parallel to each other in the vertical direction, each layer including a dielectric substrate and a conductor plate having at least two lead portions to enable connection to terminal electrodes. Plates on consecutive composite layers are connected to terminal electrodes of opposite polarity, and each plate includes at least one non-conductive region providing directionality to the electrical currents flowing through the plates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.