Voltage generating circuit, semiconductor memory device comprising the same, and voltage generating method
US7408817B2 · kind B2 · utility
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6References
19Claims
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Key dates
| Filing date | Jun 15, 2006 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Jun 15, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A voltage generating circuit for a semiconductor memory device. The voltage generating circuit includes a multi-boosting unit for stepping up a power supply voltage, a transfer transistor connected to a final boosting node of the multi-boosting unit and an output node, and a charge-sharing element, electrically connected to the final boosting node and a gate node of the transfer transistor, enabled during at least a part of the period the power supply voltage is stepped-up by the multi-boosting unit and performing charge sharing between the final boosting node and the gate node of the transfer transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.