Pulse generation scheme for improving the speed and robustness of a current sense amplifier without compromising circuit stability or output swing
US7408827B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 2005 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Aug 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/062
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a current sense amplifier (ISA) circuit with increased speed, less insensitivities to process variation, better stability and improved output signal swing. According to one embodiment, the ISA circuit described herein may include a pair of output nodes and a first pair of load transistors, each coupled between a different one of the output nodes and ground for pulling the output nodes down to a first voltage value at the beginning of a sense cycle. In addition, a pulse generation circuit is included for activating the first pair of load transistors at the beginning of the sense cycle and deactivating the first pair of load transistors once the first voltage is reached. When activated, the first pair of load transistors provide a relatively low resistance current path between the output nodes and ground. This decreases the output node discharge time and increases the overall speed of the sense amp without compromising circuit stability and output swing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.