Module integration integrated circuits
US7409200B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2004 |
| Grant date | Aug 5, 2008 |
| Priority date | — |
| Expiry date | Nov 25, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A first signal conditioning circuit is formed from a first portion, a second portion and a third portion. Signal conditioning functions of each of these portions are facilitated by a predetermined type of integrated semiconductor die within which they are formed. Two different semiconductor dies are thus provided for facilitating integration of the first through third signal conditioning portions therein. Wire bonds are provided between the two different semiconductor dies in order to form circuit paths between the different first through third portions. The signal routing using between the two different semiconductor dies provides for completing of the first signal conditioning circuit having a first signal conditioning function. For example, circuits such as interstage matching circuits are disposed on a different semiconductor die than power amplifier circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.