Ion trap in a semiconductor chip
US7411187B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Feb 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J49/0018
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A micrometer-scale ion trap, fabricated on a monolithic chip using semiconductor micro-electromechanical systems (MEMS) technology. A single 111Cd+ ion is confined, laser cooled, and the heating measured in an integrated radiofrequency trap etched from a doped gallium arsenide (GaAs) heterostructure. Single 111Cd+ qubit ions are confined in a radiofrequency linear ion trap on a semiconductor chip by applying a combination of static and oscillating electric potentials to integrated electrodes. The electrodes are lithographically patterned from a monolithic semiconductor substrate, eliminating the need for manual assembly and alignment of individual electrodes. The scaling of this structure to hundreds or thousands of electrodes is possible with existing semiconductor fabrication technology.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.