Thin film transistor array substrate and manufacturing method of the same
US7411217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Mar 2, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/942
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor array substrate has a gate electrode of the thin film transistor, a gate line connected to the gate electrode, and a gate pad connected to the gate line; a source/drain pattern including a source electrode and a drain electrode of the thin film transistor, a data line connected to the source electrode, a data pad connected to the data line, a storage electrode formed and superimposed with the gate line; a semiconductor pattern formed in low part of the substrate; a transparent electrode pattern including a pixel electrode connected to the drain electrode and the storage electrode, a gate pad protection electrode covering the gate pad, and a data pad protection electrode covering the data pad; and a protection pattern and a gate insulation pattern stacked in a region other than the region where the transparent electrode pattern is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.