JFET with drain and/or source modification implant
US7411231B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Apr 13, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/149
Abstract
The present invention provides a JFET which receives an additional implant during fabrication, which extends its drain region towards its source region, and/or its source region towards its drain region. The implant reduces the magnitude of the e-field that would otherwise arise at the drain/channel (and/or source/channel) junction for a given drain and/or source voltage, thereby reducing the severity of the gate current and breakdown problems associated with the e-field. The JFET's gate layer is preferably sized to have a width which provides respective gaps between the gate layer's lateral boundaries and the drain and/or source regions for each implant, with each implant implanted in a respective gap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.