Radiation-hardened silicon-on-insulator CMOS device, and method of making the same
US7411250B2 · kind B2 · utility
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17References
18Claims
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Key dates
| Filing date | May 13, 2004 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Jun 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/03
Abstract
A silicon-on-insulator metal oxide semiconductor device comprising ultrathin silicon-on-sapphire substrate; at least one P-channel MOS transistor formed in the ultrathin silicon layer; and N-type impurity implanted within the ultrathin silicon layer and the sapphire substrate such that peak N-type impurity concentration in the sapphire layer is greater than peak impurity concentration in the ultrathin silicon layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.