Semiconductor device and manufacturing method thereof
US7411260B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2007 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Jul 6, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S15/8925
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for improving productivity when manufacturing a semiconductor device. A lower electrode, insulating films, an upper electrode and insulating films are formed on a semiconductor substrate in a sensor region. A cavity is formed between the insulator films above the lower electrode. The lower electrode, insulating film, the cavity and insulating film, and an upper electrode form a variable capacity sensor. The cavity is formed by etching a sacrificial pattern between the insulation films by way of a hole formed in a pair of insulation films. Other than in the above sensor region, a dummy lower electrode and four insulating films are formed on the TEG region on the semiconductor substrate; and a dummy cavity is formed between a pair of insulation films above the lower electrode however no conductive layer on the same layer as the upper electrode is formed on the dummy cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.