Analog output buffer circuit for flat panel display
US7411430B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2006 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Feb 5, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An analog output buffer circuit for a flat panel display is provided for improving an output signal distortion. The circuit includes a transistor, a current source, an input capacitor, an upper switch, a lower switch, a first switch, a second switch and a third switch. In which, the transistor and the current source are electrically connected in series between a first power supply and a second power supply. The current source provides a compensatory current for the transistor when a leakage current occurs. The upper switch and the first switch are turned on during the first period, and the lower switch and the second switch are turn on during the second period, in which the second period is after the first period. Those switches eliminate the drawback of different voltage levels between the input signal and the output signal obtained from the output buffer circuit inputted by the input signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.