System located in an integrated circuit for reducing calibration components
US7411440B2 · kind B2 · utility
0Cited by
3References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2005 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Nov 15, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00384
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment of this invention provides a circuit and method for reducing the number of electronic components needed to calibrate circuits on an IC. A multiplexer is located on the IC where the outputs of a plurality of circuits located on the IC are each connected to a separate data input of the multiplexer. The control input of the multiplexer selects which data input of the multiplexer is connected to an external component. Each data input is individually connected to the component periodically.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.