Arithmetic circuitry for averaging and methods thereof
US7412473B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2004 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Jul 9, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49963
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A functional unit includes one or more instances of arithmetic circuitry for calculating averages. Each instance of arithmetic circuitry includes first, second and third adders, each having first and second inputs and an output that is a sum of the first and second inputs and a carry-in bit. An output of the first adder is coupled to a first input of the third adder, and an output of the second adder is coupled to a second input of the third adder. The arithmetic circuitry is able to calculate an arithmetic operation on a set of four inputs. The arithmetic operation is fully determined by control bits and may be: an average of two values (with or without rounding by 1), an average of four values (with or without rounding by 1 or 2), or a sum of four values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.