Memory optimization for a computer system having a hibernation mode
US7412565B2 · kind B2 · utility
14Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2003 |
| Grant date | Aug 12, 2008 |
| Priority date | — |
| Expiry date | Nov 19, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system that increases performance and reduces power consumption is described. Specifically, the system writes the contents of the system to a non-volatile memory cache before powering down. After repowering the system, the system initiates the load sequence from the memory cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.