Integrated high voltage capacitor having a top-level dielectric layer and a method of manufacture therefor
US7413947B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2006 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Dec 18, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0217
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The integrated high voltage capacitor, among other features, includes a first capacitor plate (120) located over or in a substrate (105), and an insulator (130) located over the first capacitor plate (120), at least a portion of the insulator (130) comprising an interlevel dielectric layer (135, 138, 143, or 148). The integrated high voltage capacitor further includes a second capacitor plate (160) located over the insulator (130) and a top-level dielectric layer (199) located at least partially along a sidewall of the second capacitor plate (160).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.