Method of forming floating gate array of flash memory device
US7413953B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 2006 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Dec 19, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
The method of forming a floating gate array of a flash memory device includes: (a) sequentially forming a tunnel oxide film, a floating gate forming film, a capping oxide film and a first nitride film on a semiconductor substrate with an active device region defined by device isolation films; (b) patterning the first nitride film to form a first nitride film pattern; (c) forming first oxide film spacers on sidewalls of the first nitride film pattern; (d) selectively removing the first nitride film pattern; (e) forming a plurality of second nitride film patterns separated by the first oxide film spacers on the capping oxide film; (f) selectively removing the first oxide film spacers interposed between the plurality of second nitride film patterns and a portion of the capping oxide film to expose a surface of the floating gate forming film between the second nitride film patterns; (g) forming a plurality of floating gate patterns by removing a portion of the floating gate forming film exposed using the second nitride film patterns as an etching mask; and (h) oxidizing the sidewall of each of the plurality of floating gate patterns to form sidewall oxide films therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.