Semiconductor device with shallow trench isolation which controls mechanical stresses
US7414278B2 · kind B2 · utility
17Cited by
2References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2004 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Jun 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The semiconductor device comprises a semiconductor substrate 10 with a trench 16a and a trench 16b formed in; a device isolation film 32a buried in the trench 16a and including a liner film including a silicon nitride film 20 and an insulating film 28 of a silicon oxide-based insulating material; a device isolation film 32b buried in the bottom of the trench 16b; and a capacitor formed on a side wall of an upper part of the second trench 16b and including an impurity diffused region 40 as a first electrode, a capacitor dielectric film 43 of a silicon oxide-based insulating film and a second electrode 46.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.