Linearization technique for current mode filters
US7414461B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 25, 2006 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Nov 23, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/91
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit is disclosed that compensates for the non-linearity of a current mode real pole producing circuit used to generate poles and zeros in complex filter circuits. The non-linearity of the prior art is compensated by driving one end of the primary pole producing capacitor with a signal derived from the drain current and fed back so as to counteract the non-linearity factors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.