Differential delay compensation
US7415048B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 30, 2002 |
| Grant date | Aug 19, 2008 |
| Priority date | — |
| Expiry date | Aug 10, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J2203/0094
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An alignment logic together with an MFI extractor are adapted to compensate for differential delays. The MFI extractor extracts the MFI disposed in the path overhead of each constituent time-slot. The alignment logic uses the extracted MFI to align corresponding data words (i.e., data words that are transmitted during the same time period) at the receiving end of virtually concatenated channels and that occupy different time-slots of the same channel. To perform alignment, the alignment logic stores each data word in a RAM location that is defined by an associated MFI. The data words so stored are aligned when read sequentially from their stored locations. The synchronization logic in the alignment logic synchronizes all the constituent time-slots.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.