Waveguide integrated circuit
US7417262B2 · kind B2 · utility
0Cited by
18References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 1, 2006 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Aug 7, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P3/084
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated circuit includes many metallization levels. A thick dielectric region is placed above at least two metallization levels and laterally neighboring two or more metallization levels. That part of the two metallization levels which lie beneath the dielectric region forms a screen. A conducting strip is placed on the dielectric region so that the dielectric region forms a waveguide.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.