Scalable non-blocking switching network for programmable logic
US7417457B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 2007 |
| Grant date | Aug 26, 2008 |
| Priority date | — |
| Expiry date | Jun 26, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49117
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A scalable non-blocking switching network (SN) having switches and intermediate (stages of) conductors that are used to connect substantially a first plurality of conductors, through a first set of switches, to a second plurality sets of conductors. The conductors in each set of the second plurality of conductors substantially connect, through a second set of switches, to a third plurality of sets of conductors. Each conductor of a set of the third plurality sets of conductors either connects, physically, to one pin in each of a plurality of functional blocks or, through a third set of switches, to a subsequent fourth set of conductors. The SN is scalable for larger sets of conductors by adding additional sets of intermediate conductors in a hierarchically fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.