Method for manufacturing non-volatile memory devices integrated in a semiconductor substrate
US7419876B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Feb 7, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
Abstract
A method manufactures non-volatile memory devices integrated on a semiconductor substrate and including a matrix of non-volatile memory cells and associated circuitry. The manufacturing method includes: forming a plurality of electrodes of the matrix memory cells, each electrode including a first dielectric layer, a first conductive layer, a second dielectric layer and a second conductive layer; and forming a plurality of electrodes of transistors of the circuitry each including a first dielectric layer and a first conductive layer. The method also includes forming first coating spacers on the side walls of the gate electrodes of the memory cell and second coating spacers on the side walls of the gate electrodes of the circuitry, the second spacers being wider than the first spacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.