System-on-a-chip pipeline tester and method
US7420385B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 5, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Jun 2, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/01
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A pipeline tester is disclosed that is capable of testing systems-on-a-chip (SOCs) or Devices Under Test (DUTs) in pipeline fashion. The tester provides faster, more economical testing of such SOCs and DUTs, which are loaded sequentially into the tester. A plurality of underlying test stations are disposed in the tester. Above the test stations are disposed corresponding test fixtures which are configured to receive moveable test beds therein. The test beds are mechanically and electrically connected to the underlying test stations. Loaded within each test bed is an SOC or DUT on which one or more electrical or electronic tests are performed. Once the test has been completed, the test bed is moved to another test station, where another electrical or electronic test is performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.