Low-consumption inhibit circuit with hysteresis
US7420397B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Jul 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An inhibit circuit which produces an inhibit signal when a variation in a power supply potential is detected includes a comparator having a negative input connected to a generator producing a reference potential and a positive input connected to an output of a first image circuit producing a first potential that is an image of the power supply potential. The first image circuit includes a diode and a circuit for the production of a reference current parallel-connected between a common point to which the power supply potential is applied and an output of the first image circuit connected to the positive input of the comparator. The circuit has particular utility in portable integrated circuits with very low consumption when idle such as in mobile telephony.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.