Patent · US Active

Phase-locked loop with a digital calibration loop and an analog calibration loop

US7420427B2 · kind B2 · utility

10Cited by

8References

13Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

James E. Brown · Naperville, US
Hans Cramer · Aachen, DE

Key dates

Filing date	Mar 28, 2006
Grant date	Sep 2, 2008
Priority date	—
Expiry date	Jun 15, 2026

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/099
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A phase-locked loop (PLL) architecture (100) is provided that includes a voltage-controlled oscillator (VCO) (116). The PLL architecture (100) also includes a digital calibration loop (132) coupled to the VCO (116). The digital calibration loop (132) implements a digital filter (126) to provide a digital control to the VCO (116) for centering a VCO frequency output. The PLL architecture (100) also includes an analog calibration loop (130) coupled to the VCO (116). The analog calibration loop (130) provides an analog control to the VCO (116) for adjusting the centered VCO frequency output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.