Low offset flash analog-to-digital converter
US7420497B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 28, 2006 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Jun 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/365
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A quantizer is described for use in a flash analog to digital converter (ADC), which may be implemented as part of an integrated wireless transceiver or other highly integrated electrical circuit. The quantizer may be configured to operate within such a flash ADC in an accurate manner within a desired voltage range, while minimizing factors that may otherwise lead to errors in the analog-to-digital conversion process. For example, a comparator of the quantizer may be used that has properties that are particularly well-suited for such an environment, where such properties may include, for example, a relatively low input referred offset voltage that is associated with a preamplifier of the comparator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.