Power saving method
US7421600B2 · kind B2 · utility
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6References
8Claims
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Key dates
| Filing date | Jul 29, 2005 |
| Grant date | Sep 2, 2008 |
| Priority date | — |
| Expiry date | Oct 10, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A power-saving method of continuous display and effective cost in a system that includes memory directly accessed by a CPU and at least one display device within vertical blanking. The method includes the following steps: issuing a Power-saving related message; dropping the Power-saving related message, wherein a Power-saving related flag is not set; setting the Power-saving related flag; setting a VID/FID pending bit in the CPU, wherein the vertical blanking of the display/displays occurs and clearing the Power-saving related flag, wherein the Power-saving related flag is set, and executing a power saving process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.