Selectable pole bias line filter
US7423474B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2004 |
| Grant date | Sep 9, 2008 |
| Priority date | — |
| Expiry date | Sep 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B1/30
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A current mirror with selectable filter poles provides a selected low pass filtering function to a DC bias signal generated by the current mirror. Coupled between a first MOSFET and second MOSFET of the current mirror, a low pass filter with selectable filter poles comprises a plurality of resistor-configured MOSFETs coupled to at least one capacitor-configured MOSFET to provide one of a fast settle time and improved filtering for the current mirror in one embodiment of the invention. A first resistor-configured MOSFETs, biased by logic and bias circuitry, provides a low frequency filter pole that provides an improved filtering for the current mirror. A second resistor-configured MOSFET provides a high frequency filter pole that provides a fast charge time to meet a settle time requirement.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.