Reference timing signal apparatus and method
US7424069B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2004 |
| Grant date | Sep 9, 2008 |
| Priority date | — |
| Expiry date | Oct 13, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/14
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A reference timing signal apparatus with a phase-locked loop has a computer algorithm which adaptively models the multiple frequencies of an oscillator following a training period. The oscillation frequency of the oscillator is controlled in response to a phase detector output. The computer algorithm processes the control signal applied to the oscillator. The computer algorithm updates the characteristics of the model relating to the aging and temperature of the oscillator, using for example, a Kalman filter as an adaptive filter. By the algorithm, the subsequent model predicts the future frequency state of the oscillator on which it was trained. The predicted frequency of the model functions as a reference to correct the frequency of the oscillator in the event that no input reference timing signal is available. In a case of using pre-processing infinite impulse response filters (IIRFs) before the adaptive processor, the time delay caused by the filters are compensated after the adaptive processor. Without pre-processing IIRFs, aging and temperature update rates are adaptively controlled by dynamically changing the rates depending upon the loop condition to achieve a wider trackin…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.