Communication bus system operable in a sleep mode and a normal mode
US7424315B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2002 |
| Grant date | Sep 9, 2008 |
| Priority date | — |
| Expiry date | Sep 4, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The communication bus system comprises a plurality of node circuits (10a-d) and a relay circuit (12, 14, 16) coupling the node circuits (10a-d). The relay circuit (12, 14, 16) has a transceiver circuit (124, 164) for relaying messages (21) between the node circuits (10a-d) in a normal mode. The transceiver circuit (124, 164) is powered down in a sleep mode. A detector circuit (120, 160) detects an incoming message (41) when the relay circuit (12, 14, 16) is in a sleep mode. A mode control circuit (122, 162) powers up the transceiver (124, 164) in response to detection of an incoming message (21). Steps are taken that ensure, in the normal mode, that messages (21) will not be relayed in unreadable form. The mode control circuit (122, 162) is arranged to cause the transceiver (124, 164) to relay a remainder (25) of the incoming message (21) after power up. In an embodiment the power needed to transmit the remainder (25) of the message (21) is drained from a capacitor (306) in the power supply (30) before the power supply (30) controls the power supply voltage in the normal mode. In another embodiment the detector circuit (120, 160) temporarily controls the direction of operation of t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.