Computer system, compiler apparatus, and operating system
US7424578B2 · kind B2 · utility
1Cited by
2References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2004 |
| Grant date | Sep 9, 2008 |
| Priority date | — |
| Expiry date | Oct 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/6028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A compiler apparatus for a computer system capable of improving the hit rate of a cache memory, which includes a prefetch target extraction device, a thread activation process insertion device, and a thread process creation device. The compiler apparatus creates threads for performing prefetch and prepurge. Prefetch and prepurge threads created by this compiler apparatus perform prefetch and prepurge in parallel with the operation of the main program, by taking into consideration program priorities and the usage ratio of the cache memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.