Methods of fabricating semiconductor devices including trench device isolation layers having protective insulating layers and related devices
US7427533B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 30, 2006 |
| Grant date | Sep 23, 2008 |
| Priority date | — |
| Expiry date | Nov 28, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes forming an active region including opposing sidewalls and a surface therebetween protruding from a substrate. A protective insulating layer is formed on the sidewalls of the active region, and extends away from the substrate to beyond the surface of the active region. A device isolation layer is also formed on the opposing sidewalls of the active region, and extends along the protective insulating layer to beyond the surface of the active region. As such, the protective insulating layer may protect portions of the device isolation layer extending therealong during subsequent fabrication processes. Related devices are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.