Patent · US Active

Reversible sequential element and reversible sequential circuit thereof

US7427876B1 · kind B1 · utility

3Cited by
2References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 19, 2007
Grant dateSep 23, 2008
Priority date
Expiry dateApr 9, 2027

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K3/0372
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A reversible sequential element comprises a first logic gate and a second logic gate. The first logic gate includes a first input terminal, a second input terminal, a third input terminal, a first output terminal coupled to the first input terminal, a second output terminal and a third output terminal. The second logic gate includes a first input line, a second input line, a first output line and a second output line. When the first input terminal is set to a first state, the second input terminal is coupled to the third output terminal and the third input terminal is coupled to the second output terminal; otherwise, the second input terminal is coupled to the second output terminal and the third input terminal is coupled to the third output terminal. The third output terminal, second input line and second output line are coupled to each other. The input signal carried on the first input line is set as 0 so that the second output line and the first output line have the same output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.