Efficient and flexible GPS receiver baseband architecture
US7428259B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 6, 2005 |
| Grant date | Sep 23, 2008 |
| Priority date | — |
| Expiry date | Apr 18, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01S19/235
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention provides a new baseband integrated circuit (IC) architecture for direct sequence spread spectrum (DSSS) communication receivers. The baseband IC has a single set of baseband correlators serving all channels in succession. No complex parallel channel hardware is required. A single on-chip code Numerically Controlled Oscillator (NCO) drives a pseudorandom number (PN) sequence generator, generates all code sampling frequencies, and is capable of self-correct through feedback from an off-chip processor. A carrier NCO generates corrected local frequencies. These on-chip NCOs generate all the necessary clocks. This architecture advantageously reduces the total hardware necessary for the receiver and the baseband IC thus can be realized with a minimal number of gate count. The invention can accommodate any number of channels in a navigational system such as the Global Positioning System (GPS), GLONASS, WAAS, LAAS, etc. The number of channels can be increased by increasing the circuit clock speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.