Automatic analog test and compensation with built-in pattern generator and analyzer
US7428683B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 2005 |
| Grant date | Sep 23, 2008 |
| Priority date | — |
| Expiry date | Aug 20, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A built-in-self test (BIST) scheme for analog circuitry functionality tests such as frequency response, gain, cut-off frequency, signal-to-noise ratio, and linearity measurement. The BIST scheme utilizes a built-in direct digital synthesizer (DDS) as the test pattern generator that can generate various test waveforms such as chirp, ramp, step frequency, two-tone frequencies, sweep frequencies, MSK, phase modulation, amplitude modulation, QAM and other hybrid modulations. The BIST scheme utilizes a multiplier followed by an accumulator as the output response analyzer (ORA). The multiplier extracts the spectrum information at the desired frequency without using Fast Fourier Transform (FFT) and the accumulator picks up the DC component by averaging the multiplier output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.