Pulse-signaling circuits for networks on chip
US7429884B2 · kind B2 · utility
2Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2006 |
| Grant date | Sep 30, 2008 |
| Priority date | — |
| Expiry date | Sep 14, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pulse circuit contains an input stage configured to receive input pulses on input nodes using push-pull elements, wherein a given push-pull element is configured to receive an input pulse on a given input node and to provide a corresponding internal signal. The pulse circuit further contains a feedback loop that includes a logic element coupled between outputs from the push-pull elements and reset nodes of the push-pull elements. This logic element is configured to provide one or more outputs from the pulse circuit and to reset the internal signals from the push-pull elements via the feedback loop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.