Volatile memory elements with boosted output voltages for programmable logic device integrated circuits
US7430148B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2005 |
| Grant date | Sep 30, 2008 |
| Priority date | — |
| Expiry date | Nov 4, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3225
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuits are provided that have memory elements. The memory elements produce output signals. The integrated circuits may be programmable logic device integrated circuits containing programmable logic including transistors with gates. When loaded with configuration data, the memory elements produce output signals that are applied to the gates of the transistors in the programmable logic device to customize the programmable logic. To ensure that the transistors in the programmable logic are turned on properly, the memory elements are powered with an elevated power supply level during normal device operation. During data loading operations, the power supply level for the memory elements is reduced. Reducing the memory element power supply level during loading increases the write margin for the memory elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.