Method and system for multi-PHY addressing
US7433308B2 · kind B2 · utility
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6References
15Claims
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Key dates
| Filing date | Jun 3, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Apr 3, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/405
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Multi-PHY addressing from source to destination in which n-number of channels or ports are used in a PHY layer device for communication with a link layer device. A single link layer to a single-PHY layer topology and a single link layer to a multi-PHY layer topology comprising multiple ports or channels receives a plurality of channels groups. Status indication signal is provided on continuous basis for the direct status for up to a predetermined number of channels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.