Automatic reference voltage trimming technique
US7433790B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Jun 13, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/3167
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In one set of embodiments, trimming of a reference, which may be a bandgap reference and which is configured on an integrated circuit, may be controlled by an algorithm executed by logic circuitry also configured on the integrated circuit. The bandgap reference may be configured to generate a reference voltage provided to an analog to digital converter (ADC) comprised in a temperature sensor that may also be configured on the integrated circuit. The logic circuitry may be configured to execute one or more of a variety of test algorithms, for example a Successive Approximation Method or remainder processing, that are operable to adjust values of reference trim bits used in trimming the bandgap reference. A tester system configured to perform testing of the integrated circuit may initiate execution of the test algorithm, thereby initiating the trimming process, and may wait for the test algorithm to complete within a previously defined amount of time, or may poll the logic circuitry to determine when the trimming process is complete.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.