Time-based weighted round robin arbiter
US7433984B2 · kind B2 · utility
4Cited by
13References
17Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 13, 2004 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Oct 13, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/372
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A PCI bus time-based weighted round robin arbiter has a phase table divided into a plurality of phases. Each of the phases is assigned to one of the ports on the PCI bus. An arbiter state machine is coupled to the phase table and looks at the port assignment for the next plurality of phases, for example, 3 phases. If the arbiter determines that the next plurality of phases is assigned to a single port, that port is selected as the next bus master.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.