Method and system for validating a hierarchical simulation database
US7434183B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 17, 2005 |
| Grant date | Oct 7, 2008 |
| Priority date | — |
| Expiry date | Apr 5, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/3323
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
System and method for validating a circuit for simulation are disclosed. The system includes at least one processing unit for executing computer programs, a graphical user interface for viewing representations of the circuit on a display, a memory for storing information of the circuit, and logic for representing the circuit in a hierarchical data structure, where the hierarchical data structure has a plurality of subcircuits arranged in a connected graph, and where each subcircuit has circuit elements and one or more input and output ports. The system further includes logic for traversing the hierarchical data structure in a bottom-up fashion, logic for recording input port to output port (port-to-port) properties of the subcircuits in the hierarchical data structure, logic for traversing the hierarchical data structure in a top-down fashion, and logic for identifying illegal port paths using the port-to-port properties of the subcircuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.